THE PROPOSAL AIMS TO DEVELOP AN ANALOG-TO-DIGITAL CONVERTER (ADC) REQUIRED FOR THE KINETIC INDUCTANCE DETEC…

Public award description

THE PROPOSAL AIMS TO DEVELOP AN ANALOG-TO-DIGITAL CONVERTER (ADC) REQUIRED FOR THE KINETIC INDUCTANCE DETECTOR (KID) READOUT ELECTRONICS. KIDS ARE DEVELOPED FOR PHOTOMETERS AND SPECTROMETERS FOR ASTROPHYSICS FOCAL PLANES, AND EARTH OR PLANETARY REMOTE SENSING INSTRUMENTS. ADCS EMPLOYED IN SPACE BASED KIDS ARE REQUIRED TO COMBINE SEVERAL FEATURES: RADIATION HARDNESS, LOW POWER CONSUMPTION, HIGH RESOLUTION AND HIGH-SAMPLING RATE TO FACILITATE INCREASE IN THE NUMBER OF THE READOUT TONES AND TO REDUCE THE SIZE OF THE ELECTRONICS. THE PROPOSED SAR ADC AIMS TO ACHIEVE A 12-BIT RESOLUTION AND THE LOWEST TO DATE REPORTED FIGURE OF MERIT (FOM) AT THE 1GSPS RATE. A NUMBER OF INNOVATIONS WILL BE INTRODUCED TO THE ADC IN ORDER TO COMBINE LOW POWER CONSUMPTION (BELOW 100MW) WITH THE SIGNAL TO NOISE AND DISTORTION RATIO (SINAD) OF AT LEAST 65DB. TOLERANCE TO AT LEAST 100KRADS OF TOTAL IONIZING DOSE (TID) RADIATION WILL BE ACHIEVED THROUGH APPLICATION OF ULTRA-THIN GATE OXIDE CMOS TECHNOLOGY. A NOVEL CALIBRATION TECHNIQUE FOR THE CAPACITOR MISMATCH WILL BE INTRODUCED TO IMPROVE LINEARITY AND INCREASE THE SAMPLING RATE. THE PROPOSED CALIBRATION TECHNIQUE INTRODUCED TO THE SUB-RANGING ARCHITECTURE WITH APPLICATION OF THE ASYNCHRONOUS SAR LOGIC WILL FACILITATE REDUCTION OF SWITCHING POWER. PHASE I WORK PROVIDED THE PROOF OF FEASIBILITY OF IMPLEMENTING THE PROPOSED ADC. PHASE II WILL RESULT IN THE SILICON PROVEN ADC PROTOTYPES BEING READY FOR COMMERCIALIZATION IN PHASE III.