A 25MM2 AREA (MINIMUM) SILICON TILE IN A 0.25UM TSMC BULK-CMOS PROCESS MULTI-PROJECT-WAFER (MPW) FABRICATIO…

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Award details

A 25MM2 AREA (MINIMUM) SILICON TILE IN A 0.25UM TSMC BULK-CMOS PROCESS MULTI-PROJECT-WAFER (MPW) FABRICATION RUN FOR 40 PARTS (MINIMUM). SHIPPING

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