Advanced High Speed Bus Technologies for Units Under Test (UUT), Test and Evaluation

The DoD family of automatic test systems (ATS), primarily interfaces with conventional data buses and is unable to support modern, high-speed digital data buses. Because the latest aircraft avionics and weapons systems are now incorporating high-speed buses such as SATA, IEEE 802.11 WLAN, IEEE 1394 FireWire, and USB, there is an immediate need to integrate high-speed bus testing into DoD ATS. Within DoD there are thousands of different test systems, with each of these test systems programmed differently and generally using closed architectures. This results in a fragmented knowledge base and expensive test standup requirements. By leveraging an open architecture standard such as IEEE Standard 1671 ATML to develop a high-speed digital bus signal model library, TSC will provide a means to implement a common automatic test framework. This will give the automatic test community a common framework on which to operate, reduce ATS life cycle costs by bringing test definition capabilities to in-house depot engineers, and afford dramatically reduced test program set (TPS) rehost requirements. The open architecture signal model library will be integrated into TSC’s Test Executive – a flexible, modular software tool based on its proven Crane Custom Test Bench (CCTB) currently used at NSWC Crane Division.