SBIR/STTR Research Award

High Performance Computer Modeling of Electrostatic Discharge Testing

Award identifier a88657175ca0c3c0908736f2e6883abbea557cc0d9d2b71baf3362fdb0721c51Awarding agency Department of Energy

Award amount

$202,852

Program and phase

SBIR · Phase I

Award year

2017

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Award details

Awarding agency
Department of Energy
Branch
Not reported
Recipient company
REMCOM INC
Proposal award date
2017-02-21
Contract end date
2018-02-20
UEI
C75JYE5CL328
Solicitation number
DE-FOA-0001618
Topic code
02c

Research abstract

The proposed project, “High Performance Computer Modeling of Electrostatic Discharge Testing,” addresses topic 2c of DOE Solicitation DE-FOA-0001618 requesting the development of easy-to-use, high performance computational tools for the engineering and manufacturing industries. Historically, scientists and engineers have spent many man-hours developing custom computational codes and algorithms to fit their specific modeling needs, however, many of these codes are not widely accessible to the scientific community as a whole because of their complexity and lack of user-friendly graphical user interfaces (GUIs). Additionally, recent advances in high performance computing (HPC) technologies including massively parallel processing and graphics processing unit (GPU) programming are not fully utilized due to the complexity of software development and cost of maintaining large computing clusters in house. The goal of this project is to develop a software tool capable of computationally modeling the electrostatic discharge testing process utilized by the consumer electronics and mobile device industries. The computational approach will be based on the finite-difference time-domain (FDTD) method to simulate electromagnetic field propagation resulting from the use of an ESD simulator (or gun) and the Monte Carlo method to model dielectric breakdown resulting from spark (electrostatic) discharges. Furthermore, integrating these methods with existing circuit simulation capabilities will allow users to simulate the entire ESD testing process and pinpoint specific electronic components in risk of damage. Combining these computational methods with a modern and intuitive user interface and HPC capabilities will allow users to optimize their ESD and electromagnetic compatibility (EMC) designs in an efficient manner and reduce the number of costly hardware prototypes needed during the design phase. Given the lack of commercial tools currently available capable of analyzing the entire ESD testing process, the resulting product should be extremely marketable to all industries using ESD testing.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

45 SBIR/STTR records share this UEI (1985–2025). Reported award amounts total $16,482,351. Reported amounts are not federal obligations.

Phases: Phase I, Phase II, Phase II – Direct to Phase II

Agencies: Department of Defense, National Aeronautics and Space Administration, National Science Foundation, Department of Energy

Agency intelligence

Department of Energy

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