Common Embedded Vehicle Network Diagnostics Interface Hardware

The objective of the Phase II SBIR project is to develop, integrate, and test production representative FPGA based 1394 network interface hardware. The developed hardware will be tested and demonstrated within current program avionics networks using actual aircraft equipment. This hardware will have integrated New Wave 1394 PHY and Link Layer FPGA cores. The outcome of this program will be FPGA based 1394 technology validated to resolve current avionics network issues at a Technology Readiness Level to be inserted into current and future defense and commercial programs.