High Fidelity Simulator for Hardware-in-the-Loop Testing

The objective of this SBIR development is to produce a high fidelity electro-optical simulator (HIFEOS) for hardware-in-the-loop (HITL) testing applications. The developed system will overcome the limitations of the presently employed simulators with respect to the achievable dynamic range, spectral composition, and spatial resolution. During the SBIR Phase I development, a detailed feasibility analysis and a top-level system design of the simulator for HITL testing will be performed. The HIFEOS feasibility analysis will identify the major technical risks that need to be addressed during the development. The top-level HIFEOS design will focus on selection of the key components required for successful fabrication of the system prototype during the following phase. The phase I deliverableswill include a complete feasibility study of HIFEOS, incorporating details of the system-level design alternatives, performance trade-off analysis, selection of the optimum design approach, and the expected system performance based on the choice of the key simulator components. This will lead to an innovative solution capable of exceeding the spatial resolution and the dynamic range of presently employed scene generation systems. The Phase I results will provide a solid foundation and justification for the successful HIFEOS system prototype development during the following SBIR Phase II effort.