Integrated Code Base and High Performance Embedded Computing Tool

ABSTRACT: Efficient High Performance Embedded Computing (HPEC) benefits from a heterogeneous approach by leveraging a combination of CPUs, FPGAs, and GPUs.The challenge is trying to figure out which mix is optimal for a given application and developing re-useable code to take advantage of different processor combinations.A tool suite and design process is needed to assist a user with creating heterogeneous computing platforms.This methodology can either work to upgrade an existing system and/or help the user create an entirely new high-performance computing platform optimized for a given application (such as OPIR).It provides a way to develop a solution meeting performance demands by modeling algorithmic performance on a heterogeneous platform.Colorado Engineering Inc., through its strategic partnerships with industry leaders in the commercial processor market as well as through its strong past performance in the heterogeneous HPEC discipline, is uniquely positioned to research and develop integrated code base technology and tools that can generate high-performance, hardware platform-specific code for advanced heterogeneous computing architectures.; BENEFIT: CEI has developed software and hardware technologies for a variety of government programs, and the team has transitioned over 37 products to production for use in DoD and Government systems.CEI also has experience commercializing technology developed under Government-funded programs.Products are packaged as COTS items, listed on a catalog price sheet, supported with technical application notes and marketing materials, and made available for sale to both the commercial and Government markets.CEI will promote technologies developed under this effort as part of its standard commercial product marketing and sales activities.CEI has a robust business development group, sales/distribution channels, and formal agreements with strategic partners relevant to this project such as Altera, Intel, and NVIDIA.Further evidence of CEIs SBIR commercialization success is demonstrated in its Company Commercialization Report (available online at the DoD SBIR website) and its receipt of the prestigious Tibbetts Award at the White House.This award is presented to small businesses that represent excellence in achieving the mission and goals of the SBIR and STTR program, stimulate technological innovation, and increase commercialization of Federal research.Beyond helping architect heterogeneous HPEC systems and accelerating calculations consistent with the topic focus, general commercialization of this technology is driven by an emerging market for high-performance computing solutions across commercial and defense that mix CPUs, FPGAs, and GPUs that not only increase performance but reduce SWaP footprints.The FPGA market is over $5B and expected to grow at a compound annual growth rate (CAGR) of over 9% through 2020.GPU shipments are easily over 50 million units per year.Opportunities for technology to help developers efficiently harness these technologies for efficient HPC are therefore significant.The toolkit technology that would be developed under the proposed program phases will enable heterogeneous computing architectures mixing CPUs, GPUs, and FPGAs.Prime contractors in the DoD space will also greatly benefit from such technology.Simulation infrastructures are facing computing challenges as requirements and models increase exponentially.There is a need to adapt to new technology paths that will outpace the complexity of the models required to run in the environment.The technology developed here enables an HPC solution for modeling and simulation using a mix of cutting-edge processing technology as well as an open path for future technology inserts.It supports an infrastructure that is capable of technology upgrades based upon GPU and FPGA roadmaps.Prime contractors have stated their interest in CEI's proposed work on this topic to help address future modeling and simulation challenges.CEI will pursue such relationships as the project matures to position the technology for transition as it moves to Phase II and beyond.