Programming New Computers
Award amount
$149,753Program and phase
SBIR · Phase IAward year
2015Award details
- Awarding agency
- Department of Defense
- Branch
- Defense Advanced Research Projects Agency
- Recipient company
- Dsplogic Inc
- Proposal award date
- 2015-06-11
- Contract end date
- 2016-04-14
- UEI
- R71SN7GNMT58
- Solicitation number
- 2015.1
- Topic code
- SB151-004
Research abstract
Technology keywords
Not reported
Other awards by this recipient
Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.
- Innovative Interconnectivity and Scheduling of Smart Sensors and Actuators for Reliable Propulsion Systems Controls
- Driver Performance Monitoring through Electronic Trip Tickets
- Direct Detection Ladar Pulse Processing
- High Productivity, Robust FPGA Programming Tool
- Direct Detection Ladar Pulse Processing
Awards with the same topic code
Verified by an exact topic code match. This is not a text-similarity match.
- Functional Dataflow Programming Toolchain for Portable Parallel Code
- Performance Portable Framework for Developing Graph Applications
- Performance Portable Framework for Developing Graph Applications
- Methods for Efficient Application Execution on Multiple Computer Architectures
- Functional Dataflow Programming Toolchain for Portable Parallel Code
Research funding history
10 SBIR/STTR records share this UEI (2004–2018). Reported award amounts total $3,037,547. Reported amounts are not federal obligations.
Phases: Phase I, Phase II
Agencies: Department of Defense