SBIR/STTR Research Award
High Performance, Integrated Transistors for On-Chip Power Supplies
Award amount
$1,499,926Program and phase
SBIR · Phase IIAward year
2015Award details
- Awarding agency
- Department of Defense
- Branch
- Defense Advanced Research Projects Agency
- Recipient company
- Sarda Technologies, Inc.
- Proposal award date
- 2015-03-18
- Contract end date
- 2016-11-30
- UEI
- Not reported
- Solicitation number
- 2014.3
- Topic code
- SB143-004
Research abstract
This project aggregates, adapts and leverages the optimum technology for each function in a heterogeneously integrated power stage (HIPS) for package-integrated voltage regulators (PIVRs):Gallium arsenide (GaAs) die - monolithically integrate multiple lateral field effect transistors (FETs) using a high-volume foundry. Sardas technology reduces the GaAs cost by >80% by reducing the die size and enhancing the yield.CMOS die - monolithically integrates the FET drivers, controllers and protection, using a high-volume foundry.3D Power Packaging - integrates the die and passive components in a compact QFN package utilizing high-volume 3D packaging technology.
Technology keywords
Not reported
Awards with the same topic code
Verified by an exact topic code match. This is not a text-similarity match.
- High Performance, Integrated Transistors for On-Chip Power Supplies
- High Performance, Integrated Transistors for On-Chip Power Supplies