SBIR/STTR Research Award

Digital Silicon Photomultiplier Readout Circuit

Award identifier c47e38a653e5fb1e13001aba6ade6ebc3b2dbdabfa3036e9d2626e8db665d802Awarding agency Department of Energy

Award amount

$1,000,000

Program and phase

SBIR · Phase II

Award year

2014

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Award details

Awarding agency
Department of Energy
Branch
Not reported
Recipient company
VOXTEL, INC.
Proposal award date
2014-04-08
Contract end date
2016-04-07
UEI
N2KECNUUMBF4
Solicitation number
DE-FOA-0001019
Topic code
42b

Research abstract

The need for ever more sensitive, compact, rugged, and inexpensive optical sensors is particularly acute in the fields of homeland security, biological sciences, nuclear medicine, and nuclear and highenergy physics. The ability to detect the spatial location and time of arrival of single photons with increased accuracy represents the ultimate goal in optical detection for many of these applications. Silicon photomultipliers (SiPMs), developed to meet these needs, are mostly made using processes and materials not compatible with contemporary CMOS. Moreover, the mask sets required to fabricate deepsubmicron CMOS circuits cost over a million dollars, require million dollar design tools, and require years long development by skilled design teams. Digital silicon photomultiplier (DSiPM) detector array and readout design cores are being developed and made available to fabricate high performance detector arrays for planned and future DOE science missions. The IP cores include in each unit cell: enable/disable logic, active quenching circuits (AQCs), thresholded counting circuits, time stamping circuits, sparse readout logic, Geiger mode (Gm) avalanche photodiode, and 12bit ADCS. To reduce the data bandwidth and reduce power, readout of pixel information is performed using a sparse readout technique, with onchip 14bit digitization. Digital information is readout using LVDS signals. The mask design is being developed to permit designers to quickly and efficiently fabricate new detector arrays, of various size and aspect ratio, without having to undertake the expense and risk of custom detector design. The DSiPM readout, was designed, simulated, and tested, in Phase I. The ACQ, counting, control bits, time stamping, and sparse readout were successfully tested, as were candidate Gm APD designs, and a high performance DSiPM architecture was developed, which can be used by detector developers to fabricate large area arrays, of varying aspect ratio, and with variable number of outputs. A mask set will be developed and used to fabricate DSiPM readout and arrays, on CMOS and CMOS image sensor designs, repectively. The DSiPM circuits will be characterized and will be prepared for licensing to interested users. Commercial Applications and Other Benefits: The digital single photon sensitive avalanche photodiode (DSPAD) ROIC can be used to quickly and cost effectively implement new detector designs which benefit from the economies of scale of high volume commercial CMOS and CMOS image sensor (CIS) processes. Applications for which the innovation was developed for include: nuclear medicine, homeland security, low light level imaging, Cherenkov imaging, ion imaging, fluorescence measurements, and others.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

235 SBIR/STTR records share this UEI (2000–2021). Reported award amounts total $86,180,717. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: Department of Defense, Department of Energy, National Aeronautics and Space Administration, Department of Commerce, Department of Homeland Security, Environmental Protection Agency

Agency intelligence

Department of Energy

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