SBIR Phase I: Defect Mapping Instrument for Optimizing Wafer Manufacturing Process

This Small Business Innovation Research project will investigate the feasibility of detecting subsurface defects in semiconductors. Integrated circuit manufacturing involves a number of processing steps. Starting from bare wafer, each step can lead to defects, which, if not detected, can lower yield and increase cost. Certain buried defects are not detectable using standard imaging techniques due to presence of absorptive layers. This proposal describes a non-contact, non-destructive tool that utilizes optical/acoustic technique that enables rapid wafer scan, producing subsurface defect map to locate and minimize defects during integrated circuit manufacturing. When the tool is used in infrared focal plane array manufacturing line, it increases detector array operability from 95% to near 100% due to early detection of defects. The intellectual merit of the proposed activity is applying novel optical/acoustic technique for detecting subsurface features and defects. The research objectives are to demonstrate the ability to detect subsurface defects that occur in wafers during semiconductor processing. The research activities include design, fabrication and testing to demonstrate a defect map in wafers that are not detectable by surface imaging. The outcome will be a measurement tool that can rapidly identify and locate subsurface defects. The broader impact/commercial potential of this project will greatly benefit the semiconductor manufacturing industry by providing a tool that increases yield and reduce manufacturing cost. The end user will also benefit from the lower cost of electronics resulting from increased yield. Environmental benefits include reduction of wasted wafers and associated materials and chemicals used during wafer processing. Other use of this technology is as a laboratory instrument, providing a new subsurface characterization tool to the scientific community.