The Characterization and Mitigation of Radiation Effects on Nano-technology Microelectronics

The ultimate goal of this effort is the development of advanced radiation hardened material systems and technology solutions for implementation into both silicon and compound semiconductor technologies at the nanotechnology feature sizes through the use of a gridded capacitor research methodology. To accomplish this, our team proposes to identify, fabricate, and electrically characterize both pre- and post-radiation stress various advanced gate structures, materials, and processes that can be implemented in existing CMOS fabrication processes utilizing nanotechnology feature sizes to reach this goal. Therefore, the Phase I objectives are: X Identify Current Gate Structure Issues X Fabricate and Package Gridded Capacitor Structures for Electrical/Radiation Evaluation X Evaluate and Characterize the Electrical Performance and Radiation Hardness of the Fabricated Gridded Capacitor Structures X Identify Potential Foundry Partner(s) for Subsequent Development