SBIR Phase II: Physics-Guided AI Platform for Accelerating Extreme Ultraviolet (EUV) Mask Design

The broader impact/commercial potential of this Small Business Innovation Research (SBIR) Phase II project is to strengthen domestic semiconductor manufacturing capacity at a time of global supply-chain realignment and unprecedented demand for advanced chips. By providing an intelligent software platform that shortens design-to-manufacturing cycles, the project supports faster delivery of high-performance, energy-efficient electronics that underpin cloud computing, artificial intelligence (AI), and critical infrastructure. The approach reduces waste, lowers production costs, and helps keep cutting-edge semiconductor fabrication in the United States, aligning with recent national initiatives to expand on-shore chipmaking and create high-skill jobs. In addition to enabling smaller, more capable devices for consumers and industry, the technology nurtures a new workforce at the intersection of machine learning and semiconductor engineering through internships and workforce trainings. Collectively, these outcomes promote economic growth, technological sovereignty, and increased access to computation resources by maximizing utilization of fabrication assets. The proposed project tackles the escalating complexity and turnaround delays in extreme ultraviolet (EUV) mask design by advancing a physics-guided AI platform that fuses high-fidelity EUV lithography simulation, process adaptation, and multi-objective layout optimization into a coherent, scalable service. Instead of relying on traditional rule-based models or hardware-specific software, the framework embeds fundamental optical and materials physics inside a scalable neural network architecture. An integrated optimization engine explores billions of potential design adjustments to simultaneously improve pattern fidelity, yield, and production economics, delivering manufacturable mask layouts in hours rather than weeks. Modular interfaces and modern application programming interfaces (APIs) allow rapid integration with existing electronic-design-automation flows, with optimized models to support advanced simulation capabilities to edge devices. Through these innovations, the project seeks to establish a new computational foundation for future lithography nodes, paving the way for faster, lower-cost entry of next-generation chipsets. This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.