SBIR/STTR Research Award

A Platform-Independent Framerwork for Efficient Massively Parallel Execution

Award identifier 12db7b56b674688feb8bc3fefedbada9db0efad8ae8f5f4450cfe40001042870Awarding agency Department of Defense · Air Force

Award amount

$99,844

Program and phase

STTR · Phase I

Award year

2012

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Award details

Awarding agency
Department of Defense
Branch
Air Force
Recipient company
EM PHOTONICS INC
Proposal award date
2012-04-02
Contract end date
Not reported
UEI
CA3NJCKCTN63
Solicitation number
2011.B
Topic code
OSD11-T02

Research abstract

Next-generation high-performance computers (HPCs) are built as massively parallel systems where the parallelism exists at many levels. These systems are a collection of nodes all working together. Each node generally contains more than one processor and each processor contains multiple cores. Managing and efficiently utilizing the different parallelism in such a system is a complex task. Further complicating this, we have recently seen the emergence of a new class of processing device, namely numerical co-processors such as the modern Graphics Processing Unit (GPU). GPUs sit as peers to multi-core processors within a node but also have their own programming paradigm. To develop applications that leverage future supercomputers will require utilizing the computational power available in all the devices in a system. To ease this process, EM Photonics proposes the development of tools that allow the programmer to decouple the algorithm they are developing from its underlying implementation on a specific hardware platform. This offers several advantages. First, developers can focus on defining their algorithm without being parallel programming or hardware device experts. The developer does not have to focus on things like memory management or data movement. Second, programs can be quickly adapted to new and future HPC systems as they become available because they are not overwhelmed with hardware specific code. Finally, programs will be efficiently executed through a dynamic scheduler that will protect against workload imbalance that can be modified at runtime without prior knowledge. All this will simplify the development of software for future hybrid HPC systems.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

83 SBIR/STTR records share this UEI (2001–2024). Reported award amounts total $31,278,630. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: Department of Defense, National Aeronautics and Space Administration, Department of Energy, Department of Education, Department of Health and Human Services, National Science Foundation

Agency intelligence

Department of Defense

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