Modeling and Testing of RF/HPM Effects in Selected CMOS Devices

ABSTRACT: Military applications for the use of directed electromagnetic energy seek to disrupt electronic systems by exploiting non-linearity in semiconductors. While current mode second breakdown is a thermal non-linearity often exploited, it has been demonstrated that for a broad class of semiconductors RF/HPM signals at the interface will couple to protective diodes and other diode structures and will drive the PN junctions into nonlinearity. This process will generate spurious voltages which will produce unstable operation. During Phase I it was demonstrated that SPICE/BSIMS models of voltage controlled oscillators, derived from manufacturer data sheets, could be used to predict the observed RF induced dynamic response to within 20%. It was also demonstrated that the SPICE/BSIMS VCO models could be incorporated into a general purpose RF/HPM effects modeling tool, developed under the AFRL Elemental Modeling program, and used to make predictions of circuit upsets in digital systems. The Phase II tasks will extend the SPICE/BSIMS device models to include other CMOS devices including inverters, adders, counters, and ring oscillators. In addition the Phase II tasks will extend the capabilities of the RF/HPM effects modeling tool and add a user interface to make the modeling tool useful to potential commercial and military organizations. BENEFIT: The development of a modeling capability for RF/HPM induced upset in CMOS circuits would have an immediate effect on the ability to predict upset of digital circuits. The resulting models would assist in the development of end-to-end RF/HPM effects codes, the development of waveforms targeted at specific types of equipment, and the ability to assess the RF/HPM vulnerability of foreign digital assets that may be physically unavailable. Commercial applications would include modeling of RF susceptibilities, support of EMC/EMI testing of digital equipment, and possible inclusion into design standards.