Massively Parallel High Temperature Probe System for Wafer-level Reliability Testing

Historical methods of reliability assessment are less and less effective as device sizes shrink. Larger sample sizes and longer duration tests are increasingly needed. At the same time, efforts to continue scaling semiconductors to ever smaller geometries is leading to an explosion of new device structures, materials and processes. The cost of testing these innovations is becoming a major barrier to their commercialization. The NIST Phase 1 project demonstrated that existing reliability test systems cannot reduce the cost of test significantly for these long duration tests, but concluded that a tightly integrated system offers the potential for a 10-fold reduction in test costs. However, a tightly integrated system introduces risks and unknowns due to the thermal, mechanical and electrical interaction of system components. The objective of this Phase 2 effort is to explore interactions between a broad range of feasible alternative identified in Phase 1 and develop the best possible combination into an integrated system.