SBIR/STTR Research Award

Multi-fovea Parallel Sensor-processor Architectures and Algorithms for UAV Platforms

Award identifier a6c190ba8f8617f56fb5054b28cbb05ba4e2b20d2906cbd6c13d42763391e854Awarding agency Department of Defense · Navy

Award amount

$79,998

Program and phase

SBIR · Phase I

Award year

2011

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Award details

Awarding agency
Department of Defense
Branch
Navy
Recipient company
EUTECUS, INC.
Proposal award date
2011-05-09
Contract end date
Not reported
UEI
Not reported
Solicitation number
2011.1
Topic code
N111-063

Research abstract

Eutecus proposes to design and develop the next generation of advanced sensor electronics to improve existing UAV based persistent surveillance and sense-and-avoid capabilities. The new device will consist of the following main components: (i) a specific sensor-processor front-end sensitive in VIS/NIR wavelength with minimum array size of 1024x1024 and frame rates above 1kHz; and (ii) a generic, scalable multi-core processor back-end with embedded algorithms supporting real-time image stabilization and multi-fovea feature/signature analysis for improved terrain/object recognition and sense-and-avoid type processing. The ROIC carrier of the advanced sensor component will be implemented in ASIC, while the multi-core processor solution in high-end FPGA. The integrated product will meet defense-grade requirements. Proof-of-concept hardware development is planned in Phase I combined with field tests in order to validate the technology and provide input for refining Phase II goals. Eutecus is working with multiple Prime contractors (including NGC, LMCO and BAE all provided support letters) to ensure that design objectives of this program will be optimized for relevant defense applications.

Technology keywords

Not reported

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Agency intelligence

Department of Defense

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