SBIR/STTR Research Award

Development and Packaging of Radiation Immune Nano-Diamond Integrated Circuits for Advanced Interceptor Avionics

Award identifier 863994ae13b7845f06b139aed1f1c65ae9614c4d62628dcd5491939e48f32995Awarding agency Department of Defense · Missile Defense Agency

Award amount

$99,781

Program and phase

SBIR · Phase I

Award year

2010

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Award details

Awarding agency
Department of Defense
Branch
Missile Defense Agency
Recipient company
AET, Inc.
Proposal award date
2010-05-03
Contract end date
2010-11-02
UEI
TKP3NYHKK2Y3
Solicitation number
2009.3
Topic code
MDA09-006

Research abstract

The goal of this program is to develop nanosacle electronics and packaging technology that is hardened to space and nuclear radiation. Vanderbilt will assist AET in the development of packaging technologies for lateral emission-based diamond devices characterized for temperature insensitivity and radiation hardness. A laterally configured diamond emission device can offer significant advantages for IC-compatible high-speed and RF applications from its low input and negligible parasitic capacitance features, lithography controlled sub 100nm interelectrode gap and versatile emitter geometry, and monolithic integration of multiple device electrodes, all achieved using simple microfabrication process steps. The Vanderbilt University Diamond Laboratory built the first diamond lateral emitter. They have now developed a consistent fabrication technique, paralleling IC process technology for nanodiamond lateral field emission devices, operable at very low electric fields and voltages, generating high currents. Diodes and transistors form the major building blocks of an integrated circuit. Monolithic vacuum diodes and triodes have been developed with the nanodiamond lateral field emitter, using consistent and conventional microelectronic processing techniques. The capability of patterning thousands of these devices monolithically on the same substrate has been demonstrated. These low-voltage operating diamond devices can be suitably developed and interconnected, achieving silicon IC equivalent and compatible logic gates.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

29 SBIR/STTR records share this UEI (1995–2015). Reported award amounts total $6,685,129. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: Department of Defense, National Aeronautics and Space Administration

Agency intelligence

Department of Defense

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