Radar on a Chip

This proposal presents an innovative low power and high performance transceiver (TR) microwave monolithic integrated circuit (MMIC) for a 15.7~17.7 GHz Ku-band (or 10~12 GHz X-band) Radar-On-Chip (ROC) applications. The radar TR MMIC utilizes phase-array architecture for improved directivity. The radar TR MMIC includes a low noise front-end with low noise amplifier (LNA) and mixer. The TR MMIC is featured with 12bit low-power analog-to-digital-converters (ADC) with programmable sample rate of 40~120MHz and input bandwidth 10~30MHz. The TR MMIC also includes a high-speed low-power direct-digital-synthesizer (DDS) with programmable clock frequency up to 2 GHz. The DDS further includes a 24-bit phase accumulator and a 10-bit sinusoidal-weighted digital-to-analog-converter (DAC) to achieve better than 50dBc spurious-free-dynamic-range (SFDR). The DDS also includes a chirp modulator to allow stretch procession that relaxes the input-bandwidth requirement for the ADCs. The TR MMIC uses a low-noise phase-locked-loop (PLL) to generate both the ADC/DDS clocks and the multi-phase local-oscillator (LO) signals for phase array transmission. The TR module has a power amplifier (PA) driver with innovative bias boosting scheme to drive off-chip PAs. The proposed SiGe TR MMIC can achieve low power consumption of less than 6W for Ku-band and X-band radar applications.