Amazon Stream Processor Architecture and Software Development

Stream processors form a new class of architectures that offers performance scalable to TeraOPS on a single chip, have cost and power efficiency comparable to ASICs, and are completely software programmable from high-level languages. Stream processor technology was developed over 8 years from 1997-2004 of DARPA-funded research on the Imagine project at Stanford University that resulted in a working prototype IC, software tools, application software, and evaluation board. This technology provides a 4-20x improvement in GOPS and GOPS/Watt compared to other leading commercially-available software-programmable DSPs and multi-core processors. As this architecture is scaled to smaller CMOS technologies, it will be feasible to integrate 100s to 1000s of ALUs on a single chip, providing TeraOPS of performance. In this proposal, we will develop an architecture, set of software tools, and application libraries for a 64-lane TeraOPS stream processor named Amazon. The architecture efficiently supports thread-level, data-level, and instruction-level parallelism, while retaining the advantages of bandwidth efficiency supported by stream processing.