Advanced Signal Processing Technologies for BMDS Radars

A critical component of the Ballistic Missile Defense System is the high power radar. These radars support the capability to identify, assess, and engage threats to the U.S., deployed forces, and allies. The current radar deployments utilize single-instance, symmetric multiprocessor machines. Both HP and SGI SMP processors have become or are becoming obsolete and the radars will require an upgrade to a scalable computing architecture. Future radar developments require a new computing architecture due to the limited availability of the existing HP platforms. The next generation architecture is envisioned to be a heterogeneous cluster of blade processors connected by a high bandwidth fabric, like InfiniBand. This new cluster computing architecture must meet stringent real-time computing requirements, and be highly scalable. This Phase II SBIR provides a better understanding of this technology and the complete implications of its use. Additionally, it will provide the Government with the most viable and cost effective approach to migrate to a scalable, distributed computing architecture. The specific focus of this Phase II SBIR is the development of a tactically-representative distributed Raytheon Radar Tracker prototype. This will be developed in 18-months with a portion of technical collaboration subcontracted to Raytheon IDS.