High Sensitivity Analog to Digital Converter for Wideband RF Signal

With the advances in solid-state electronics and optoelectronics, ultra wideband radio frequency receiver designs are now practical. One of the consequences of these large bandwidth waveforms is the very high range resolution that results. Various architectures of receivers have been proposed for the ultra wideband applications, but most popular architectures among them are heterodyne, homodyne, low-IF and zero-IF. The receiver designs require large bandwidths to preserve signal waveforms and high-speed circuits for signal detection. Normally, the wideband signal components at the low and the high bounds are processed with different fidelity due to the difference in dispersion and loss. Additionally, the frequency-dependent wideband signal loss must be also addressed in the receiver design. The ultra wideband receiver must be equipped with high-performance analog-to-digital converters (ADCs). In receiver, extremely high sampling rate is required in order to preserve and repeat the wideband signal for digitizing. In light of this, we propose an ADC architecture which includes a novel analog signal pre-processing stage. Through the pre-processing stage, incoming signals are filtered and transformed at real time within analog RF domain. The proposed architecture enhances the robustness against noise and jitter, ultimately SNR and SFDR, for the high fidelity signal-to-information conversion.