Secure Processors
Award amount
$99,997Program and phase
SBIR · Phase IAward year
2006Award details
- Awarding agency
- Department of Defense
- Branch
- Army
- Recipient company
- ACCORD SOLUTIONS, INC
- Proposal award date
- 2006-06-26
- Contract end date
- 2007-06-26
- UEI
- KJJKJCJH27S3
- Solicitation number
- 2005.3
- Topic code
- OSD05-A10
Research abstract
Technology keywords
Not reported
Other awards by this recipient
Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.
- Non Destructive Trusted FPGA Verification
- Anti-Tamper Technologies for Missile Defense
- Anti-Tamper Technologies for Missile Defense
- Secure Processors
- Anti-Tamper Active and Passive Sensors for Use Inside an Integrated Circuit
Awards with the same topic code
Verified by an exact topic code match. This is not a text-similarity match.
- Protecting Sensitive Data through Novel Algorithm Transformations and Algebraic Splitting
- Secure Processor using Opcode Diversity
- Secure Processors
- Security Amplification Through Data Splitting: Achieving High Security Using Moderately Secure Hardware
Research funding history
10 SBIR/STTR records share this UEI (2002–2017). Reported award amounts total $3,836,263. Reported amounts are not federal obligations.
Phases: Phase I, Phase II
Agencies: Department of Defense