Thermal NanoImaging of Semiconductor Devices

Understanding defect formation is critical to the development of microelectronic components, particularly those that normally operate at high temperature. In wide bandgap semiconductor components, for example, high-power and high-frequency operation leads to thermally precipitated defects that are difficult to predict via modeling and that leave little evidence of their origins after failure. Mitigating the effects of such defects has been a development obstacle for these otherwise promising technologies. To date, there are no practical techniques with the requisite spatial resolution and temperature sensitivity for observing nanoscale defect formation in devices operating at high temperatures. In this SBIR project, we propose a solution for nanoscale temperature mapping in operating semiconductor devices. NanoElectronic Imaging (NEI) has demonstrated temperature mapping with scanning transmission electron microscope (STEM) electron beam-induced current (EBIC). Building on these preliminary results, NEI will use two distinct STEM EBIC modes, and correspondingly different device geometries, to demonstrate nanoscale thermal imaging of GaN-based transistor samples under self-heating in Phase I. In Phase II, calibration experiments will be performed to enable quantitative temperature mapping in semiconductor devices, and hardware and software will be developed to enable thermometry in operating devices alongside electronic imaging of the resulting defects.