SBIR/STTR Research Award

Triple3 Redundant Spacecraft Subsystems (T3RSS)

Award identifier aa04416b108736b263cd19f341cf2fb5c7e7f6f60907a729947330aeaa32498bAwarding agency National Aeronautics and Space Administration

Award amount

$100,000

Program and phase

STTR · Phase I

Award year

2006

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Award details

Awarding agency
National Aeronautics and Space Administration
Branch
Not reported
Recipient company
REDEFINE TECHNOLOGIES, INC.
Proposal award date
2006-01-24
Contract end date
2007-01-22
UEI
Not reported
Solicitation number
Not reported
Topic code
T1.01

Research abstract

Redefine Technologies, along with researchers at the University of Colorado, will use three redundancy methods to decrease the susceptibility of a spacecraft, on a mission survivability level, to electronic failures anywhere throughout the spacecraft. By using Field Programmable Gate Array (FPGA) chips, we will analyze the spacecraft-wide benefits of: *triplicating the logic and RAM on-board each subsystem using a Xilinx proprietary Triple Modular Redundancy (TMR) tool; *triplicating the persistent memory storage (i.e. ROM, science data, and flight code) on-board each subsystem using various methods specific for the space environment; and, *triplicating the backup architecture itself, while reducing weight and volume requirements, so subsystem code can run on alternate processors if any component is rendered inoperable due to an electronic failure (radiation, manufacturing, human-error, etc). These three methods of triplication should significantly increase the reliability of non-radiation hardened designs, which should allow commercial off-the-shelf (COTS) processing components to be used as flight critical hardware. The analysis that is performed will predict the total benefit of this approach to any future spacecraft.

Technology keywords

Not reported

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Agency intelligence

National Aeronautics and Space Administration

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