High Performance High-Output Resistive Emitter Design and Circuit Implementations

This program will develop CMOS “Read In Integrated Circuits” (RIIC) that have the unique capability of delivering the high current densities required to operate the next generation of very high-temperature resistive emitters. Heretofore impossible because of the very large unit cell current levels required, Nova will make use of the advances made in the Phase I program to produce wafers that support the operation of 256 x 256 arrays of emitters that can reach surface temperatures of approximately 3000 K. During Phase I Nova developed a plan for depositing copper overlayers onto previously-produced silicon “Read In Integrated Circuits” (RIIC) so as to be able to provide a source of high current density to the RIIC. This will enable enough current density throughout an entire large-area RIIC device to be able to support the high surface temperature emitter operation of a new family of emitting materials that are being concurrently developed by Dr. Steven Solomon of Acumen Consulting. Additionally, Nova developed two methods to provide “in-cell” monitoring and control functions to help the unit cell compensate for the degrading effects of high temperature operation. Initial CMOS designs for these functions were produced and will be tested in Phase II. Wafers of these devices will be made available for future emitter integration and testing operations.