Dynamic Module Server for FPGA Defragmentation

Luna Innovations proposes to develop a Dynamic Module Server (DMS) that manages dynamically reconfigurable modules to prevent fragmentation in runtime-reconfiguring FPGA applications. The DMS will be capable of maximizing the available contiguous FPGA resources by efficiently floorplanning the modules currently running on the FPGA. While many FPGA defragmentation approaches model the FPGA as a two dimensional (2D) memory grid and the configurable elements running on the FPGA as easily distributable blocks in that grid, such modeling simplifies the real-world complexities of routing between the interrelated configurable elements and external I/O. Luna's proposed Dynamic Module Server will take into account not only fragmentation within the FPGA, but it will also provide for module interconnections and external I/O connections by pre-compiling both the modules and their interconnects. This simplifies the runtime routing of these modules because most of the work will have been performed at compile time. Optional pre-computations allow connections to be incorporated in the module's bitstream without incurring any runtime overheads. The Phase 1 effort will consist of the research and design necessary to create the DMS. At the end of the Phase 1 effort, a working first-generation DMS prototype will be demonstrated using a Xilinx Virtex-II FPGA.