SBIR/STTR Research Award

LATCHUP SUPPRESSION TO FACILITATE FAULT-TOLERANCE IN TERMINAL GUIDANCE COMPUTERS

Award identifier e666138f0cf8bef1581a771ce0fc1f5f7d8377bee49f83c2a0c7b4ad1c037151Awarding agency Department of Defense · Missile Defense Agency

Award amount

$99,796

Program and phase

SBIR · Phase I

Award year

2005

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Award details

Awarding agency
Department of Defense
Branch
Missile Defense Agency
Recipient company
FULL CIRCLE RESEARCH, INC.
Proposal award date
2005-02-15
Contract end date
2005-08-14
UEI
Not reported
Solicitation number
2004.4
Topic code
MDA04-093

Research abstract

Fault tolerance in a real-time computing environment is a critical need for the terminal guidance computer in interceptors in Ground-based Midcourse Defense (GMD). In much of the GMD system, fault detection, correction and/or compensation can be done entirely in software. But in the case of faults introduced into the guidance computer by radiation, a combined hardware and software approach can be very useful. Specifically, high dose rates can cause logic upset, but can also cause latchup in integrated circuits. The former can be handled by EDAC, or in extreme cases, by a rollback to data stored in non-volatile memory, and re-starting from this earlier point. But if latchup occurs, power to the computer must be toggled off, then restored. This can take much longer that EDAC or rollback. In the short mission duration of an interceptor, this time may not be available. If latchup-immune chips can be employed, coping with high dose rates is greatly simplified, since power doesn't need to be dumped. The proposed program applies to the high dose rate threat a technique developed for suppressing latchup caused by heavy ions in space. Success in this effort will significantly simplify the job of developing a fault tolerant real-time computing environment for GMD.

Technology keywords

Not reported

Awards with the same topic code

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Agency intelligence

Department of Defense

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