SBIR/STTR Research Award

Hardware Architectures for Flexible Component-Based Hybrid Cognitive Systems

Award identifier d47262c89105fb0253937ce2eddd39ffa70edc1ae07304cb911ef00aafe5037bAwarding agency Department of Defense · Defense Advanced Research Projects Agency

Award amount

$99,000

Program and phase

SBIR · Phase I

Award year

2004

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Award details

Awarding agency
Department of Defense
Branch
Defense Advanced Research Projects Agency
Recipient company
Intelligent Automation, Inc.
Proposal award date
2004-07-14
Contract end date
2005-02-28
UEI
C3QJD7VXG167
Solicitation number
2004.1
Topic code
SB041-019

Research abstract

Creating a realization of cognitive processes, reasoning, and behavior is a challenging problem due to its size, scope and complexity. Current realizations of cognitive systems are software based and typically implemented on conventional von Neumann processors. However, performance is a constraining factor in applications that require extensive testing, training and learning as well as in the implementation cognitive processes that require high memory bandwidth or are computationally intensive. In such cases, hardware processing elements that are tailored or made suitable for cognitive functions will be required. However, due to the rapid evolution and development of cognitive system requirements, missions and architectures, any hardware-based solutions must remain flexible and capable of supporting a variety of cognitive architectures and functions. At the same time, new cognitive system design and architectures should be build out of modules, each which can be specialized to particular hardware platforms without disturbing the other parts of the design. We propose to define a set of detailed requirements and designs for flexible hardware platforms that support both existing cognitive architectures and the next generation of component-based cognitive agents. The requirements and specifications of the hardware will be driven by the existing set of knowledge representations, reasoning representations, and cognitive models and architectures. We will also explore design methodologies for novel component-based cognitive architectures that can be used to exploit hardware processing elements and cognitive processing hardware architectures while retaining the flexibility, modularity and reusability of software implementations on COTS processors.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

1,182 SBIR/STTR records share this UEI (1987–2021). Reported award amounts total $369,972,257. Reported amounts are not federal obligations.

Phases: Phase I, Phase II, Phase II – Direct to Phase II

Agencies: Department of Defense, National Aeronautics and Space Administration, Department of Transportation, Department of Health and Human Services, National Science Foundation, Department of Homeland Security

Agency intelligence

Department of Defense

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