SBIR/STTR Research Award

A Single Event Upset Immune Re-Programmable FPGA Utilizing a Commercial Architecture

Award identifier b883530ddf8b1817cba4efb4035c7262f81fb223104176c1f1d1757a54b90bebAwarding agency Department of Defense · Defense Threat Reduction Agency

Award amount

$100,000

Program and phase

SBIR · Phase I

Award year

2003

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Award details

Awarding agency
Department of Defense
Branch
Defense Threat Reduction Agency
Recipient company
STRUCTURED MATERIALS INDUSTRIES, INC.
Proposal award date
2003-08-01
Contract end date
2003-12-31
UEI
WMLSF59AE7E1
Solicitation number
2003.1
Topic code
DTRA03-005

Research abstract

Radiation tolerant Field Programmable Gate Arrays (FPGA's) have gained wide and rapid acceptance by military and aerospace equipment suppliers; however, there are presently a limited number of chip-sets available for production. The lack of FPGA alternatives severely limits the range of available functions and applications that would greatly benefit from increased performance with radiation hardness. Further, FPGA technology that can be produced from common mass production techniques is highly sought after for significant cost savings on a per unit basis. We propose to use our newly invented radiation tolerant high temperature non-linear dielectric to develop a Single Event Upset (SEU) immune re-programmable and nonvolatile logic device, a small FPGA, that is immune to SEU events. In Phase I we will show proof of our high temperature non-linear dielectric proof of concept and in Phase II we will optimize the technology for prototype demonstration in a commercial manufacturing environment using common mass production techniques, and demonstrate packaged device functionality for use in radiation environments. Phase III will be product introduction to the military and commercial space markets. A ferroelectric Field Re-Programmable Gate Array has significant potential to replace existing "one time" programmable logic devices with increased functionality in a nonvolatile element. These radiation hardened devices will directly address an annual military market of approximately $250M as well as be applicable to an approximate commercial Programmable Logic Device (PLD) annual market of over $1B.

Technology keywords

Not reported

Other awards by this recipient

Verified by the same UEI. These are other public SBIR/STTR award pages, not a merged company record.

Awards with the same topic code

Verified by an exact topic code match. This is not a text-similarity match.

Research funding history

177 SBIR/STTR records share this UEI (1992–2024). Reported award amounts total $45,517,958. Reported amounts are not federal obligations.

Phases: Phase I, Phase II

Agencies: Department of Defense, Department of Energy, National Aeronautics and Space Administration, National Science Foundation, Department of Commerce, Department of Homeland Security

Agency intelligence

Department of Defense

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