SBIR/STTR Research Award
PLANAR DOPED PSEUDOMORPHIC HIGH ELECTRONIC MOBILITY TRANSISTOR DEVELOPMENT
Award amount
$55,107Program and phase
SBIR · Phase IAward year
1991Award details
- Awarding agency
- Department of Defense
- Branch
- Missile Defense Agency
- Recipient company
- Quantum Epitaxial Designs,
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
THE MOST PROMISING MATERIAL SYSTEM TO MEET THE PERFORMANCE CRITERIA FOR LOW NOISE AND POWER DEVICES OPERATING AT MILLIMETERWAVE FREQUENCIES IS THE PLANAR DOPED PSEUDOMORPHIC HIGH ELECTRON MOBILITY TRANSISTOR. WITH MMIC PROCESSING COMPATIBILITY WITH STANDARD ALGAAS/GAAS HEMTS, THIS MATERIAL SYSTEM HAS POTENTIAL FOR RAPID INSERTION INTO MILLIMETER-WAVE SATELLITE BASED COMMUNICATION SYSTEMS. FOR POWER APPLICATIONS, THE ADDITION OF THE PLANAR DOPED LAYER INCREASES THE CURRENT HANDLING CAPABILITY AND THEREFORE INCREASES THE POWER DENSITY OF THE DEVICE. PHASE I OF THIS PROGRAM WILL OPTIMIZE THE LOCATION AND PLANAR SHEET CHARGE LAYER OF THE SINGLE PLANAR DOPED AND DOUBLE PLANAR DOPED HEMT MATERIALS. TO INCREASE THE CARRIER CONFINEMENT IN FABRICATED DEVICES, ALAS/GAAS SUPERLATTICE AND LOW TEMPERATURE BUFFER LAYERS WILL BE DEVELOPED AND TESTED. ONCE THE EFFECTS OF THESE BUFFER LAYERS ARE KNOWN ON THE TRANSPORT PROPERTIES IN THE 2DEG, 0.25 MICRON GATE LOW NOISE DEVICES WILL BE FABRICATED BY THE HUGHES MICROWAVE PRODUCTS DIVISION WHERE THE EFFECTS OF THE IMPROVED MATERIAL QUALITY WILL BE EVALUATED. SUCCESSFUL COMPLETION OF THIS PROGRAM WILL IDENTIFY THE LOCATION OF THE PLANAR SHEET CHARGE LAYERS AND OPTIMUM BUFFER LAYER PROFILE THAT WILL YIELD THE LOWEST NOISE DEVICES.
Technology keywords
Not reported