SBIR/STTR Research Award

Accelerated Encryption Key Recovery Using FPGAs

Award identifier 4fec2b0462b88fd808239c62058b936faae89ecba36cf4af8af9a7a5f0327c37Awarding agency Department of Homeland Security

Award amount

$97,916

Program and phase

SBIR · Phase I

Award year

2007

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Award details

Awarding agency
Department of Homeland Security
Branch
Not reported
Recipient company
CRUCIAL SECURITY, INC.
Proposal award date
Not reported
Contract end date
Not reported
UEI
Not reported
Solicitation number
Not reported
Topic code
Not reported

Research abstract

This proposal describes a system that would expedite the lawful decryption of encrypted containers by leveraging the computational speed of field-programmable gate arrays (FPGAs). The proposed system, which is partially hardware-based, will provide dramatic increases in speed when compared to purely software-based solutions. In addition to being able to increase speed, the solution is also highly scalable, as up to 28 of the recommended FPGAs can be used in parallel on a single desktop computer. During Phase I, Crucial Security will design and develop a proof of concept tool to recover data that has been encrypted with an open source encryption product. The work during this phase will involve comparing the performance of the proposed solution, using a single FPGA, against a pure software-based system. The work will form the foundation for subsequent development for decryption of multiple common encryption container formats. It will also open the door to using multiple FPGAs in parallel to achieve even greater performance gains.

Technology keywords

Not reported

Agency intelligence

Department of Homeland Security

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