Integration of PZT Films with CMOS by a Low Temperature Manufacturing Process of MOCVD for High-Density, Radiation-Hard, Nonvolatile Ferroelectric Mem

Commercially realizing viable nonvolatile ferroelectric random access memory (NVFRAM) was hampered in previous decades by problems related to either the reliable performance of the ferroelectric capacitor or to the growth and processing of capacitor layers In the past several years the reliability of ferroelectric capacitor such as fatigue, retention, and imprint of polarization has been significantly improved due to replacing metallic electrodes with conducting oxides. The state-of-the-art 256Kbit NVFRAM are available in the market. However, in order to compete with silicon based nonvolatile flash memory a higher density NVFRAM must be developed. Processing ferroelectric films on the patterned CMOS device substrates at a low temperature is the key for the high-density NVFRAM structures. Sputtering and sol-gel process are the two common methods used in today's NVFRAM manufacturing. The former requires high deposition temperature and the later provides non-uniform thickness at the edges of submicron features. In this Phase I program NZAT will demonstrate an in situ deposition of LSCO/PNZT/LSCO on 4" silicon wafers at a substrate temperature of 550_C by a manufacture process of single-liquid-source metalorganic chemical vapor deposition. This process is highly compatible with a standard silicon CMOS process. The major commercial applications of the proposed process is for computer memories which is a multibillion worldwide market. Ferroelectric based memories have a potential to replace a substantial portion of currently used silicon based memories.