FPGA FOPEN SAR Digital Processor

The goal of the FPGA FOPEN SAR digital processor is to provide adequate foliage penetration that allows the detection of concealed man-made objects in dense foliage. Our Phase I work on the FPGA FOPEN SAR digital processor included the generation of 100dBdata for detection performance enhancement, the identification of map registration for hyperspectral image processing and the reduction of cluttering rejection over the analog system for all weather operations. During the Phase I effort, Trident and GWUsuccessfully developed a spotlight SAR algorithm operating at 500 MHz, demonstrated by MATLAB, and illustrated using FPGA implementation. Trident proposes to continue the development of the FOPEN SAR processor by investigating all implementation aspects,augmenting and improving the existing techniques and manipulation capabilities, and integrating COTS components. This development process will include six major task areas, which collectively represent an aggressive, success-oriented approach culminatingin the production of a functional prototype system suitable for the evaluation and testing in simulated and real-world environments. In addition, the development process will ensure the existence of migration paths for Phase III applications of theresulting technology and implementation.BENEFITS: The successful completion of this Phase II effort will significantly advance thecapability to portray a low cost, high performance, low power, portable, compact,high speed, and digital FOPEN SAR system. Technology developed during Phase II canbe readily adapted to existing and planned systems. Specific military andcommercial applications include a hand held SAR tool, airport airbornereconnaissance systems, surveillance and air traffic control, and environmentalmonitoring devices.