Electronic Design Automation: Parameterized Tools for Wireless Communications

Rising increases in semiconductor capabilities have changed face of ASIC design. Designers recently demanding increased die densities are now concerned with how they can afford the NRE to design a complex ASIC. Gate counts have far outpaced design tool capabilities, measured in gates designed per engineer-day. Automated VHDL generation is a potentially promising field, but the approach has failed to produce code sufficiently efficient to allow significant use of mobile communications; this is especially true in battery-powered portable handset applications, where power and size are at a premium. With wireless applications representing an ever increasing number of new design starts, the rapid emergence of wireless and mobile communications make this an attractive area for EDA enhancements. COM-Solutions, Inc. proposes to approach this problem with a combined communication system design/EDA tool based on configurable modular VHDL building blocks (cores) for communications functions. Benefits are shortened design time, reduced probability of design errors, and better opportunities for optimization, all of which reduce cost. Our work plan includes a trial system design and an example VHDL core, synthesized and simulated. This will be suitable for integration into an existing tool, augmenting its current capabilities. We intend to leverage and compliment existing tools.