SBIR Phase II: Next Generation Binary Decision Diagrams (BDD)-Based Logic Optimization System

This Small Business Innovation Research Phase II project targets the synthesis of very large-scale integrated circuits (ICs) and systems on chip (SoC) in very short CPU time. The expected short CPU time comes from relying on binary decision diagram (BDDs) that replaced the traditional algebraic representations used pervasively in present-day tools. This Phase II SBIR project is devoted to developing further the capabilities of swift and integrating it with a number of commercial tools. The development plan includes new capabilities, such as improving area by adding new logic transformations and improving the speed of processing by implementing novel decomposition algorithms. This project will significantly advance the theory of modern logic optimization and promote its understanding in industry and academia. It would also promote the inclusion of faster logic synthesis tools in existing Electronic Design Automation (EDA) systems. It would benefit the national EDA industry, and help the US to maintain its competitive advantage against its foreign competitors in this strategically important market.