Implementation of EDA Tools & Circuit Design Techniques to Mitigate Radiation Effects on BIST Circuitry

"Increased electronic system performance requirements and improved semiconductor manufacturing techniques have driven component suppliers to continually increase the number of operating functions and in many cases, integrate multiple devices, into singlesemiconductor packages. As device complexity increases, production level testing becomes more time consuming and less effective due to the increased number of fault conditions to be tested. Components with a Built In Self Test (BIST) capability have theadvantage of improved fault coverage during production, as well as improved functionality over the service life of the device. As BIST capability is incorporated into radiation-hardened components, the effects of the radiation environment on the BISTfunction, and how the BIST circuitry interacts with the standard device function during a radiation event, is unclear. Designers must understand the BIST operation in all environments to ensure overall system performance and reliability are maintained.The proposed Phase 1 research will demonstrate the feasibility of developing BIST circuitry design guidelines and techniques for radiation environments and incorporating standardized design rules into a commercially available Electronic Design Automation(EDA) tool suite for use by system designers. Development and implementation of design guidelines and techniques for radiation hardened components and BIST circuitry into a commercially avail