INSTRUMENTATION OF LOGIC UPSET DETECTION IN TRANSIENT ENVIRONMENTS

A TEST INSTRUMENTATION SYSTEM IS PROPOSED FOR THE DETECTION AND ISOLATION OF UPSET FAULTS PRODUCED BY TRANSIENT RADIATION IN VHSIC CLASS ASICS AND GENERAL PURPOSE MICROCIRCUITS. THE PROPOSED SYSTEM IS COMPOSED OF A HIGH SPEED WORK STATION, A PORTABLETESTER, AND A SEPARABLE TEST HEAD CONTAINING THE DEVICE UNDER TEST TO BE PLACED IN THE RADIATIONN BEAM. THE WORK STATION ACTS AS A CONTROLLER FOR THE TESTER. IT ALSO SERVES AS A PLATFORM FOR SOFTWARE PROGRAMS TO AID IN THE SELECTION OF TEST VECTORS, THE SIMULATION OF MICROCIRCUIT PERFORMANCE, AND THE ISOLATION OF CIRCUIT ELEMENTS RESPONSIBLE FOR THE FAULT. A VHDL DESCRIPTION OF THE MICROCIRCUIT IS THE BASIS FOR THE SIMULATION AND DIAGNOSTIC ALGORITHMS. THE PROPOSED TESTER INCLUDES PROVISIONS FOR BOUNDARY SCAN TESTING AS DEFINED BY THE PROPOSED IEEE STANDARD 91149.1. THE PROPOSED TEST HEAD DESIGNS INCLUDES PROVISIONS FOR TYPICAL ASIC PACKAGE TYPES. IT WILL BE DESIGNED TO PERMIT ALIGNMENT WITH THE RADIATION BEAM AND TO ACCOMMODATE DOSIMETRY. PHASE I ACTIVITIES WILL INCLUDE FEASIBILITY STUDIES WHICH WILL SERVE AS THE BASIS FOR A DETAILED DESIGN AND FABRICATION OF THE SYSTEM IN PHASE II.