SBIR/STTR Research Award

Massively Parallel Processing for Image Processing

Award identifier 62edd154eaad4c37964ccb89b689bad17aac28a028da48b1d73bd467acf46672Awarding agency Department of Defense · Navy

Award amount

$69,652

Program and phase

SBIR · Phase I

Award year

1996

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Award details

Awarding agency
Department of Defense
Branch
Navy
Recipient company
Nova Management, Inc.
Proposal award date
Not reported
Contract end date
Not reported
UEI
Not reported
Solicitation number
Not reported
Topic code
Not reported

Research abstract

We propose to develop a massively parallel processing system for image processing that will contain 4 to 64 reconfigurable DSPs/Neuro chips individually rated at 1.2-2.4 GigaFLOPS (10-20 BOPS) capable of operating in parallel and providing 5-153 GigaFLOPS performance for image processing applications. These parallel rDSP chips possess large associated internal memories (4-16 Mbytes/chips) to support the processing of large sections of individual images. Nova Management has a design approach for developing parallel systems in the range of 1.2 GigaFLOPS to several TeraFLOPS> Dr. Medvedev, Principal Investigator, has designed similar systems in Russia containing 32-640 parallel DSPs. The system we propose combines Russian design theory with US hardware. The resulting machine will be capable of performance of at least 20 GigaFLOPS with Gigabytes of RAM.

Technology keywords

Not reported

Agency intelligence

Department of Defense

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