SBIR/STTR Research Award
THREE-DIMENSIONAL OPTOELECTRONIC SIGNAL PROCESSOR USING SURFACE-EMITTING LASER INTERCONNECTS
Award amount
$762,273Program and phase
SBIR · Phase IIAward year
1993Award details
- Awarding agency
- Department of Defense
- Branch
- Army
- Recipient company
- Photonics Research, Inc.
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
THE OBJECTIVE OF THIS PROGRAM IS TO DEVELOP AN ULTRA HIGH-SPEED OPTOELECTRONIC SIGNAL PROCEESOR BASED ON OPTICAL INTERCONNECTS TO ACHIEVE ORDERS OF MAGNITUDE IMPROVEMENT IN THE PERFORMANCE OF COMPUTING AND SIGNAL PROCESSING SYSTEMS AND SUITABLE FOR MANY APPLICATIONS SUCH AS: OPTICAL SIGNAL PROCESSING AND COMPUTING, SURVEILLANCE, TRACKING, ACQUISITION, AND KILL ASSESSMENT. THE CLOCK SPEEDS OF ALL-ELECTRONIC COMPUTERS ARE TWO TO THREE ORDERS OF MAGNITUDE SLOWER THAN THE SPEED CAPABILITIES OF THE ELECTRONIC LOGIC DEVICES ON THE CHIPS DUE TO FUNDAMENTAL CONSTRAINTS IN IMPEDANCE MATCHING AND THE VON NEWMANN BOTTLENECK. WE PROPOSE TO OVERCOME THESE SPEED LIMITATIONS BY USING OPTOELECTRONIC INTERCONNECTS. OF THE MANY OPTOELECTRONIC DEVICES AVAILABLE, (E.G. SPATIAL-LIGHT MODULATORS, LEDS, EDGE-EMITTING SEMICONDUCTOR LASERS, ETC.) THE VERTICAL-CAVITY SURFACE-EMITTING LASER PROVIDES AN INTERCONNECTION CAPABILITY HAVING THE BEST SPEED, POWER, RELIABILITY, AND EASE OF IMPLEMENTATION. FURTHERMORE MONOLITHIC VERTICAL INTEGRATION OF THE MICROLASER WITH ITS DRIVER REDUCES TO NEARLY ZERO THE LENGTH OVER WHICH HIGH-SPEED, RELATIVELY HIGH-POWER SIGNALS MUST PROPAGATE. IN THIS PROGRAM WE PROPOSE TO DEVELOP A VERTICALLY INTEGRATED STRUCTURE WITH SPECIFIC REGIONS SERVING AS RECEIVERS WHILE OTHERS FUNCTION AS TRANSMITTERS AND DESIGN A PROCESSOR BASED ON THIS INTERCONNECTION SCHEME. OUR PROPOSED PROCESSOR WILL INITIALLY CONSIST OF A MULTIPLICITY OF VERTICALLY (THREE-DIMENSIONAL) STACKED PLANES. EACH PLANE WILL BE COMPRISED OF GAAS ELECTRONIC LOGIC AND OPTOELECTRONIC INTERPLANE INTERCONNECTS CONSISTING OF SURFACE-EMITTING LASER TRANSMITTERS AND HIGH-SPEED PHOTOTRANSISTORS AS RECEIVERS. THIS WILL SET THE STAGE FOR DESIGNING NEW CHIPS OPTIMIZED TO TAKE ADVANTAGE OF THE INCREASED SPEED OF THESE INTERCONNECTS AND FOR IMPLEMENTING A HIGH-SPEED THREE-DIMENSIONAL OPTOELECTRONIC SIGNAL PROCESSOR.
Technology keywords
Not reported