SBIR/STTR Research Award
Direct InGaP/GaAs Wafer-Scale Epitaxial Release Technique for Multifuntional Optoelectronic Chip Module On Si Substrate
Award amount
$98,941Program and phase
SBIR · Phase IAward year
1997Award details
- Awarding agency
- Department of Defense
- Branch
- Defense Advanced Research Projects Agency
- Recipient company
- Polanyi Knowledge Research
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
Technical Abstract (Limit your abstract to 200 words with no classified or proprietary information/data.) Epitaxial Release (WSER) Technique for Multifunctional Optoelectronic Chip Module On Si substrate. Unlike conventional epitaxial lift-off technique which only allow limited die size bonding and selective etching on AlGaAs only, PKR's direct InGaP/GaAs wafer-scale bonding technique will achieve aggressive full-wafer integration of GaAs OEIC on Si substrate. Also, in order to be compatible with standard Si foundry process, WSER will fully utilize standard Si equipment and procedures, such as plasma etching, PECVD and polyimide deposition. With this full Si process mentality, PKR's innovative approach will bridge the gap between conventional ELO process and Si process, and offer dramatically low cost, high yield and high packaging density for defense and commercial application. Although the dual way selective etching are developed on In GaP and GaAs, the exact OEIC epitaxial structure and design are not limited to InGaP/GaAs compound. In fact, the application can even cover much broader and diversified OEIC design with InGaAs/InP or AlGaP compound, in addition to conventional AlGaAs/GaAs compound. By using WSER technique, GaAs VCSEL, LED, PINFET receiver arrays and optical modulators can be fully integrated and self-aligned with complete and low cost Si IC signal processor.
Technology keywords
Not reported