MONOLITHICALLY INTEGRATED AVALANCHE PHOTODIODE ARRAYS

MONOLITHIC INTEGRATION OF SILICON AVALANCHE PHOTODIODE (APD) ARRAYS WITH THEIR ASSOCIATED ELECTRONICS IS BEING INVESTIGATED. THE PHOTODIODE ELEMENTS ARE BASED ON THE STATE-OF-THE-ART PROCESS WHICH ACHIEVES UNIFORM BULK BREAKDOWN BY USING NEUTRON TRANSMUTATION DOPED SILICON AND A "BEVELED JUNCTION" TO SUPPRESS SURFACE BREAKDOWN. RESEARCHERS INTEND TO COMBINE THESE PHOTODIODE ARRAYS WITH THEIR READOUT ELECTRONICS BY USING A SPECIAL BONDED WAFER APPROACH TO ACHIEVE THREE-DIMENSIONAL INTEGRATION. THE PROCESSED PHOTODIODE WAFER IS BONDED TO A PRIME WAFER. THE READOUT ELECTRONICS WILL BE PROCESSED IN THIS PRIME WAFER AFTER IT HAS BEEN THINNED. THE READOUT ELECTRONICS AND PHOTODIODES WILL BE FULLY DIELECTRICALLY ISOLATED WITH ELECTRICAL CONNECTIONS MADE BY MEANS OF VIAS OPENED THROUGH THE SILICON FILM AND BURIED DIELECTRIC. THE FEASIBILITY STUDY INCLUDES FABRICATION OF A TWO ELEMENT APD ARRAY, INTEGRATION OF THIS ARRAY INTO A BONDED WAFER SUBSTRATE, AND PROCESSING OF THE INTERCONNECTS.