SBIR/STTR Research Award
Power Efficient Space Computer
Award amount
$98,408Program and phase
SBIR · Phase IAward year
2002Award details
- Awarding agency
- Department of Defense
- Branch
- Air Force
- Recipient company
- STAR BRIDGE SYSTEMS, INC.
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
Power consumption in microprocessors is rapidly increasing. Reconfigurable computing using FPGA chips where functions can be performed in parallel instead of the traditional serial processing methods of existing microprocessors offers the opportunity forincreased capability and performance at great savings to electrical power requirements. With traditional microprocessors, only a very small portion of each chip does productive work at any moment. Yet the entire chip consumes power. The reconfigurablecomputing approach uses a much larger proportion of the circuitry of each chip to do meaningful work at any moment. Star Bridge Systems is developing reconfigurable computers with associated software to cost effectively program and utilize low powerconsumption computers. There are many opportunities for improved performance and capability of computers using recongifurable logic. Using parallel computing techniques, made possible through a specialized software development system called Viva, actual reconfigurablecomputers are now cost effective. This technology is scalable for any type of system from small battery powered applications to supercomputers. Reconfigurable computers will find future applications in any type of digital processing application from DSPcontrol to high level processing.
Technology keywords
Not reported