THE PRIMARY FOCUS OF THIS SBIR PROJECT IS THE RESERCH FOR THE DEVELOPMENT OF A TECHNOLOGY FOR DESIGNING AND FABRIC ATING NON-AVAILABLE MICROCIRCUITS USING STATE-OF-THE-ART CMOS PROCESSES.

THE PRIMARY FOCUS OF THIS SBIR PROJECT IS THE RESERCH FOR THE DEVELOPMENT OF A TECHNOLOGY FOR DESIGNING AND FABRIC ATING NON-AVAILABLE MICROCIRCUITS USING STATE-OF-THE-ART CMOS PROCESSES. THE RESEARCH IS AIMED AT KEEPING THE NON- RECURRING ENGINEERING (NRE) COSTS ASSOCIATED WITH BOTH DESIGN AND FABRICATION LOW. DESIGN COSTS FOR THE PARTS WILL BE KEPT LOW BY USING A MODIFIED VERSION OF A METHODOLOGY KNOWN AS PATH PROGRAMMABLE LOGIC (PPL) WHICH HAS BEEN DEVELOPED WITH SUPPORT FROM DARPA BY THE VLSI GROUP AT THE UNIVERSITY OF UTAH AND LICENSED TO BONNEVILLE SCIENTIFIC, INC. MANFACTURING COSTS WILL BE KEPT LOW FOR THE SMALL QUANTITIES REQUIRED BY USING MULTICHIP FABRICATION TECHNIQU ES WHERE SEVERAL DIFFERENT CIRCUITS WILL BE MADE WITH ONE MASK SETS. THE FABRICATION FUNCTION WILL BE IMPLEMENTED THROUGH DARPA'S MOSIS SYSTEM WHICH IS INITIATING A NEW PROCESSING CONSISTANCY PROGRAM TO ACHIEVE THE CONTROL OF DEVICE SPECIFICATIONS NECESSARY FOR THIS PROJECT.