SBIR Phase II: Zero-Remanence Tamper-Responsive Cryptokey Memory

This SBIR Phase II research project is to develop a more secure encryption key for non-volatile memory. Secure ICs often utilize encryption to protect non-volatile memory contents. A clever engineer can recover the key after decapsulating and probing the semiconductor die. NVE intends to produce an innovative non-volatile spintronic cryptographic key memory that will self-erase without data remanence in the event of tampering and without applied power. The main research objectives of this work involve development of a fully integrated 256-bit embedded tamper resistant magnetic random access memory. The technology proposed in this Phase II SBIR program is intended to provide a defense against theft of intellectual property and to protect sensitive data stored in an integrated circuit. Identity theft has become a very large issue for society in general and particularly in the more computerized societies. This is more than a problem of economics, as US military systems have also been reversed engineered by both friendly and unfriendly nations to gain access to US weapons capability. The technology proposed under the Phase II program addresses the need to provide a tighter level of security for data stored on integrated circuit (IC) and IC assemblies. Commercially, this provides an extra layer of protection on IC-based assemblies such as smart cards, cash machines etc. In addition, the proposed program would render a system inoperable in the event of physical tamper. This may be a very useful tool in stemming the tide of fraudulent usage, compromises, and reverse engineering of IC-based instruments as well as certain types of identify theft.