SBIR/STTR Research Award
Optically Reconfigurable FPGA
Award amount
$99,000Program and phase
SBIR · Phase IAward year
1997Award details
- Awarding agency
- Department of Defense
- Branch
- Defense Advanced Research Projects Agency
- Recipient company
- Holoplex
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
We propose to develop integrated optoelectronic modules that combines directly holographic optical memories and integrated silicon circuits. We use a novel phase conjugate readout method that allows direct, lens-less mating of the optical and integrated components resulting in a compact and inexpensive package. The inclusion of detector arrays on the silicon surface results in parallel transfer of data from the optical memory into the electronic circuit at rates in excess of 100Gbits/sec. We propose to use laser diode arrays for accessing individual holograms providing very rapid access to individual pages of stored data. We will concentrate on the development of optically reconfigurable FPGA's. These devices are normally reprogrammed electronically from local memories to perform a variety of logic functions. The direct interface between the optical memory and the FPGA will provide rapid access to a huge set of reconfiguration geometries. Our goals for the Phase I portion of the proposed program are: Design, fabricate, and characterize FPGA chips incorporating detector arrays to allow optical addressing. Design the rapid access optical holographic memory system using switchable laser diode arrays. Perform proof-of-concept experiments to confirm the method. Explore specific application areas for which the optically reconfigurable FPGA's are best suited, including image processing and general purpose parallel computing.
Technology keywords
Not reported