Input Proection Circuits for Cryogenic Silicon ICs

A MAJOR ELEMENT OF THE THREAT TO SPACE LWIR SURVEILLANCE SYSTEMS FROM EXOATMOSPHERIC NUCLEAR WEAPONS EFFECTS IS THAT OF EMP/SGREMP PRODUCED ELECTRICAL OVERSTRESS (EOS) ON READ OUT ELECTRONICS USED IN CONJUNCTION WITH FOCAL PLANE ARRAYS IN IMAGING SYSTEMS. USE OF EXISTING TECHNOLOGY FOR PORTECTING SUCH CIRCUITS FROM EOS WOULD BE PROBELMATICAL BECAUSE OF THE CRYOGENIC TEMPERATURES AT WHICH THEY OPERATE. IMAGERS USING HG CD TE DETECTORS USUALLY OPERATE AT TEMPERATURES FROM 77K TO 30-40K, WHILE THOSE USING SI:X DETECTORS OPERATE AS LOW AS 10K. FULL CIRCLE RESEARCH, INC (FCR) PROPOSES TO CONDUCT AN SBIR PROGRAM TO STUDY THE EFFECT OF LOW TEMPERATURES ON INPUT PROTECTION DEVICES AND INPUT PORTECTION TECHNOLOGY FOR CRYOGENIC SILICON IC. WHERE APPROPRIATE, FCR WILL EXPLOIT DEVICE PHENOMENA UNAFFECTED BY FREEZEOUT (E.G. TUNNEL BREAKDOWN IN PLACE OF CONVENTIONAL AVALANCHE BREAKDOWN. PHASE I OF THIS EFFORT WILL CARRY OUT THE DESIGN OF CRYOGENIC IPDS THRU THE CONCEPTUAL DESIGN REVIEW STAGE, WHILE PHASE II WILL DESIGN, BUILD, AND DEMONOSTRAE A BREAKBOARD VERSION OF ACRYOGENIC INPUT PROTECTION CIRCUIT USING THESE NEW DEVICES.