HIGH-SPEED, LOW-COST WORKSTATION FOR COMPUTATION-INTENSIVE STATISTICS

THERE IS A GROWING NATIONAL NEED TO PROVIDE RESEARCHERS WITHHIGH-SPEED AND COST-EFFECTIVE COMPUTERS CAPABLE OF HANDLING COMPUTATION-INTENSIVE STATISTICAL AND FORECASTING PROBLEMS. EXAMPLES OF SUCH STATISTICAL ANALYSES INCLUDE BOOTSTRAPPING AND PROJECTION PURSUIT REGRESSION. WHILE SUPERCOMPUTERS ARE OFTEN NEEDED TO SPEED THE SOLUTION FOR THESE PROBLEMS, THERE ARE PROBLEMS ASSOCIATED WITH SUPERCOMPUTER USE. THESEINCLUDE LIMITED AVAILABILITY AND A HIGH COST FOR ROUTINE APPLICATIONS. THE USE OF A COMMERCIALLY-AVAILABLE DIGITAL SIGNAL PROCESSOR (DSP) CHIP OFFERS A LOW-COST ALTERNATIVE TOMANY OF THESE PROBLEMS. HOWEVER, ITS APPLICATION WILL REQUIRE NEW ALGORITHMS CAPABLE OF EXPLOITING THE UNIQUE FEATURES OF THIS DEVICE. THIS PROGRAM PROPOSES RESEARCH TO EVALUATE THE FEASIBILITY OF USING THE DSP AS A HIGH PERFORMANCE COPROCESSOR CONFIGURED TO PERFORM STATISTICAL COMPUTATIONS AT SPEEDS APPROACHING THAT OF LOWER END SUPERCOMPUTERS. IN THE INITIAL RESEARCH, THE BUILDING BLOCKS NECESSARY FOR STATISTICAL COMPUTATION WILL BE SELECTED. FROM THESE BUILDING BLOCKS, OPTIMIZED ALGORITHMS AND HARDWARE/SOFTWARE CONFIGURATIONS FOR DSP USE WILL BE DETERMINED BASED ON ANALYTICAL, SIMULATION, AND EXPERIMENTAL RESULTS. THE RESULT OF ALL PHASES OF THE PROJECT WILL BE A LOW-COST TOOL FOR HIGH-SPEED STATISTICAL COMPUTATION.