SBIR/STTR Research Award

DEVELOPMENT OF A MULTI-DSP SYSTEM FOR NEURAL COMPUTATION

Award identifier 575ec4e1aaa7ad9c2f87adf7f90cf50d9f8cd30c67697d15b0abcbb65b2d6077Awarding agency National Science Foundation

Award amount

$64,563

Program and phase

SBIR · Phase I

Award year

1994

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Award details

Awarding agency
National Science Foundation
Branch
Not reported
Recipient company
NeuroDimension Incorporated
Proposal award date
Not reported
Contract end date
Not reported
UEI
Not reported
Solicitation number
Not reported
Topic code
Not reported

Research abstract

NEURAL COMPUTATION REQUIRES VERY HIGH COMPUTING BANDWIDTHS, MAINLY WHEN REAL-WORLD, TIME VARYING CLASSIFICATION PROBLEMS ARE ADDRESSED. THIS PROJECT OUTLINES A PLAN TO DEVELOP A LOW COST, MULTI-DIGITAL SIGNAL PROCESSING SYSTEM THAT INTERFACES TO UPSCALE PCS AND/OR WORKSTATIONS. THE MULTI-PROCESSOR ARCHITECTURE IS BASED ON A PARTITIONING SCHEME WHICH PRODUCES A COMPUTATION LOAD THAT SCALES WITH N(2), AND A GLOBAL COMMUNICATION LOAD (IDLE TIME) WHICH SCALES WITH RESPECT TO N (WHERE N IS THE NUMBER OF NEURONS IN A GIVEN LAYER). THE MULTI-PROCESSOR BOARD IS BEING TRANSPARENTLY INTEGRATED WITH AN EXISTING NEURAL NETWORK PACKAGE (NEUROSOLUTIONS) RECENTLY DEVELOPED AND COMMERCIALIZED, WHICH PROVIDES AN ICON-BASED SIMULATION ENVIRONMENT FOR DYNAMIC (AND STATIC) NEURAL NETWORKS. THE COMBINATION OF THE FAST HARDWARE WITH THE POWER OF NEUROSOLUTIONS PRODUCES AN EXCELLENT PRICE/PERFORMANCE RATIO WHICH SHOULD MAKE FAST NEURAL COMPUTING AFFORDABLE TO THE AVERAGE PC USER.

Technology keywords

Not reported

Agency intelligence

National Science Foundation

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