SBIR/STTR Research Award
Radiation Tolerant Embedded Memory
Award amount
$69,587Program and phase
SBIR · Phase IAward year
2002Award details
- Awarding agency
- Department of Defense
- Branch
- Missile Defense Agency
- Recipient company
- PicoDyne, Inc.
- Proposal award date
- Not reported
- Contract end date
- Not reported
- UEI
- Not reported
- Solicitation number
- Not reported
- Topic code
- Not reported
Research abstract
"PicoDyne proposes development of CMOS Radiation Tolerant Memory Blocks for use in Missile System ASICs. We have developed and demonstrated devices using our standard cell library using a commercial design flow. In addition, our process has core operatingVoltages much lower than that of most CMOS ASIC processes (0.5V), greatly reducing both the power consumed, and heat generated by our circuits. This library and Radiation Tolerant/Ultra Low Power design methods have been demonstrated in several differentdigital devices. The availability of RT memory cells will allow the development of cache memory for general purpose processors, dual-port RAMs for Digital Signal Processors or communication chips, and large register files for any application. These cellswill be developed on a new Ultra Low Power silicon CMOS foundry process, which results in a great reduction in power while maintaining speed, and providing Total Dose Radiation Tolerance. Our own design Hardening techniques are used to achieve latchupimmunity and SEU tolerance. The result of this research will be to allow rapid development of complex Ultra Low Power Radiation Tolerant digital microelectronics. This technology is applicable for use in Missile Systems, Civil and Military Space systems,and Nuclear Industry electronics. Once the combination of Radiation Tolerant Memory and our Standard Cell Library is proven effective, other military electronics providers will als
Technology keywords
Not reported